NOVOSENSE NSi83085/NSi83086: High Reliability Isol...
創建於：2025年2月9日
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NOVOSENSE
NSi83085/NSi83086: High Reliability Isolated
Half- and Full-Duplex RS-485 Transceivers
Datasheet (EN) 1.4
Copyright © 2019, NOVOSENSE
Page 1
Product Overview
NSi83085 is a high reliability isolated half duplex RS-485
transceiver based on NOVOSENSE digital isolation
technology, while NSi83086 is an isolated full duplex RS-
485 transceiver. Both devices are safety certified by
UL1577 support 5kVrms insulation withstand voltages,
while providing high electromagnetic immunity and low
emissions at low power consumption.
The Bus pins of NSi83085/NSi83086 are protected from
±16kV system level ESD to GND2 on Bus side. These
devices feature fail-safe circuitry, which guarantees a
logic-high receiver output when the receiver inputs are
open or shorted. The devices have a 1/8-unit-load
receiver input impedance that allows up to 256
transceivers on the bus.
The data rate of NSi83085 is 500kbps. The device is slew
limited to reduce EMI and reflections with improperly
terminated transmission line. The data rate of NSi83086 is
up to 16Mbps.
Key Features
Up to 5000Vrms Insulation voltage
Bus side power supply voltage: 3.0V to 5.5V
VDD1 supply voltage: 2.5V to 5.5V
High CMTI: ±150kV/us
High system level EMC performance:
Bus Pins meet IEC61000-4-2 ±16kV ESD
Other Pins meet ±7kV contact ESD
Fail-safe protection receiver
NSi83085 has slew rate limitation
Up to 256 transceivers on the bus
Isolation Barrier Life: >60 years
Operation temperature: -40℃~105℃
RoHS-compliant packages:
SOIC-16 wide body
Safety Regulatory Approvals
UL recognition: up to 5000Vrms for 1 minute per UL1577
CQC certification per GB4943.1-2011
CSA component notice 5A
DIN VDE V 0884-11:2017-01
Applications
Industrial automation system
Isolated RS-485 communication
Smart electric meter and water meter
Security and protection monitoring
Functional Block Diagrams
VDD1
R
DE
GND1
GND2
A
NSi83085
B
GND2
GND1
D
/RE
NC
NC
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
GND1
VDD2
GND2
VDD1
R
DE
GND1
GND2
A
NSi83086
B
GND2
GND1
D
/RE
Z
Y
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
GND1
VDD2
GND2
Figure 1. NSi83085 & NSi83086 Block Diagrams
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE
Page 2
Index
1.0 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................................................................................................................ 3
2.0 SPECIFICATIONS ...................................................................................................................................................................................................................................................................................................................... 3
2.1. DC ELECTRICAL CHARACTERISTICS .......................................................................................................................................................................................................................................................................................... 3
2.2. SWITCHING ELECTRICAL CHARACTERISTICS .................................................................................................................................................................................................................................................................... 5
2.3. TYPICAL PERFORMANCE CHARACTERISTICS ...................................................................................................................................................................................................................................................... 7
2.4. PARAMETER MEASUREMENT INFORMATION .............................................................................................................................................................................................................................................................. 9
3.0 HIGH VOLTAGE FEATURE DESCRIPTION ........................................................................................................................................................................................................................ 10
3.1. INSULATION AND SAFETY RELATED SPECIFICATIONS ............................................................................................................................................................................................................................................ 10
3.2. DIN VDE V 0884--11（（VDE V 0884--11））:2017--01 INSULATION CHARATERISTICS .......................................................................................................................................... 11
3.3. REGULATORY INFORMATION...................................................................................................................................................................................................................................................................................................... 12
4.0 FUNCTION DESCRIPTION .................................................................................................................................................................................................................................................................................. 13
4.1. DATA RATE .................................................................................................................................................................................................................................................................................................................................................. 13
4.2. TRUE FAIL--SAFE RECEIVER INPUTS ...................................................................................................................................................................................................................................................................................... 13
4.3. TRUTH TABLES ........................................................................................................................................................................................................................................................................................................................................ 13
4.4. THERMAL SHUTDOWN .................................................................................................................................................................................................................................................................................................................... 14
5.0 APPLICATION NOTE ...................................................................................................................................................................................................................................................................................................... 14
5.1. 256 TRANSCEIVERS ON THE BUS .......................................................................................................................................................................................................................................................................................... 14
5.2. ESD PROTECTION ................................................................................................................................................................................................................................................................................................................................ 14
5.3. LAYOUT CONSIDERATIONS............................................................................................................................................................................................................................................................................................................ 14
5.4. TYPICAL APPLICATION ...................................................................................................................................................................................................................................................................................................................... 14
6.0 PACKAGE INFORMATION .................................................................................................................................................................................................................................................................................. 16
7.0 TAPE AND REEL INFORMATION .......................................................................................................................................................................................................................................................... 18
8.0 ORDER INFORMATION ............................................................................................................................................................................................................................................................................................ 19
9.0 REVISION HISTORY ........................................................................................................................................................................................................................................................................................................ 20
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 3
1.0 ABSOLUTE MAXIMUM RATINGS Parameters Symbol Min Typ Max Unit Comments
Power Supply Voltage
VDD1, VDD2
-0.5
6
V
Maximum Input Voltage
/RE, DE, TxD
-0.4
VDD+0.4
V
Common--Mode Transients
CMTI
-150
150
kV/us
Driver Output/Receiver Input Voltage
VA, VB, VY, VZ
-7
12
V
Receiver Output Current
Io
-15
15
mA
Maximum Surge Isolation Voltage
VIOSM
5.3
kV
Operating Temperature
Topr
-40
105
℃
℃
Storage Temperature
Tstg
-40
150
℃
℃
Electrostatic discharge
HBM (Bus pins and GND)
±8000
V
HBM(All pins)
±6000
V
CDM
±2000
V
2.0 SPECIFICATIONS
2.1. DC ELECTRICAL CHARACTERISTICS
(VDD1=2.5V5.5V, VDD2=4.5V5.5V, Ta=--40℃℃ to 125℃℃. Unless otherwise noted, Typical values are at VDD1 = 5V, VDD2 = 5V, Ta = 25℃℃) Parameters Symbol Min Typ Max Unit Comments
Power supply voltage
VDD1
2.5
5.5
V
VDD 2
3.0
5.5
V
Bus Side
Logic--side supply current
IDD1
3.32
4.98
mA
VDD1=5V, DE=high, /RE=D =low, no load
3.26
4.89
mA
VDD1=3V, DE=high, /RE=D =low, no load
Bus--side supply current
IDD2
3.35
5.02
mA
VDD2=5V, DE=high, /RE=D =low, no load（（NSi83085））
2.15
3.23
mA
VDD2=5V, DE=high, /RE=D =low, no load（（NSi83085））
Thermal--Shutdown Threshold
TTS
165
℃
℃
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 4
Thermal--Shutdown Hysteresis
TTSH
15
℃
℃
Common Mode Transient Immunity
CMTI
±100
±150
kV/us
Logic Side
Input High Voltage
VIH
2
V
DE, D, /RE
Input Low Voltage
VIL
0.8
V
DE, D, /RE
Input Threshold
VIT
1.6
V
Input Threshold at rising edge
VIT_HYS
0.4
V
Input Threshold Hysteresis
Input Pull up Current
IPU
20
uA
DE,/RE
Input Pull down Current
IPD
-10
uA
DI
Output Voltage High
VOH
VDD1--0.3
V
IOH = --4mA
Output Voltage Low
VOL
0.3
V
IOL = 4mA
Output Short--Circuit Current
IOSR
110
mA
0 ≤ VR ≤VDD1
Three--State Output Current
IOZ
-15
uA
0 ≤ VR ≤ VDD1 , /RE = high
Input Capacitance
CIN
2
pF
DE, D, /RE
Driver
Differential Output Voltage
| VOD |
VDD2
V
No Load
2.7
VDD2
V
See Figure 2.4.1, RL=100Ω (RS--422)
2.1
VDD2
V
See Figure 2.4.1, RL=54Ω (RS--485)
Change in magnitude of the
differential output voltage
Δ|VOD |
0.2
V
See Figure 2.4.1, RL=100Ω or RL=54Ω
Common--Mode Output Voltage
| VOC |
VDD2/2
3
V
See Figure 2.4.1, RL=100Ω or RL=54Ω
Change in Magnitude of
Common--Mode Voltage
Δ|VOC |
0.2
V
See Figure 2.4.1, RL=100Ω or RL=54Ω
Driver Short--Circuit Output
Current
IOSD
250
mA
0 ≤ VOUT ≤ +12 V
-250
mA
−7V ≤ VOUT ≤ VDD2
Output Leakage Current (Y and Z) Full--Duplex
IO
125
uA
DE=GND, VIN=12V
-75
uA
DE=GND, VIN=--7V
Receiver
Input Current (A and B)
IA , IB
125
uA
DE=GND, VDD2=GND or
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VDD2, VIN=12V
-200
uA
DE=GND, VDD2=GND or VDD2, VIN=--7V
Receiver Differential Threshold Voltage
VTH
-200
-125
-50
mV
−7V ≤ VCM ≤ 12V
Receiver Input Hysteresis
ΔVTH
15
mV
VA+VB=0
Receiver Input Resistance
RIN
96kΩ
−7V ≤ VCM ≤ 12V, DE=low
2.2. SWITCHING ELECTRICAL CHARACTERISTICS
(VDD1=2.5V5.5V, VDD2=2.5V5.5V, Ta=--40℃℃ to 105℃℃. Unless otherwise noted, Typical values are at VDD1 = 5V, VDD2 = 5V, Ta = 25℃℃) Parameters Symbol Min Typ Max Unit Comments
Driver (NSi83085)
Maximum Data Rate
fMAX
0.5
Mbps
Driver Propagation Delay
t PLH
450
675
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
t PHL
430
645
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Pulse Width Distortion,|t PHL –– t PLH |
PWD
20
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Output Falling Time or Rising time
tF
590
885
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
tR
590
885
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Enable to Output High
tZH
310
465
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Enable to Output Low
tZL
310
465
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Output High to Disable
tHZ
30
45
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Output Low to Disable
tLZ
30
45
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Receiver (NSi83085)
Maximum Data Rate
fMAX
0.5
Mbps
Receiver Propagation Delay
t PLH
102
153
ns
See Figure 2.4.4，， CL=15pF
t PHL
92
138
ns
See Figure 2.4.4，， CL=15pF
NSi83085/NSi83086
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Receiver Pulse Width Distortion
PWD
10
ns
|t PHL –– t PLH |,See Figure 2.4.4，， CL=15pF
Receiver Output Falling Time or Rising time
tF
2.5
3.75
ns
See Figure 2.4.4，， CL=15pF
tR
2.5
3.75
ns
See Figure 2.4.4，， CL=15pF
Receiver Enable to Output High
tZH
18.5
27.75
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Enable to Output Low
tZL
18.5
27.75
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Disable to Output High
tHZ
23
34.5
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Disable to Output Low
tLZ
23
34.5
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Driver (NSi83086)
Maximum Data Rate
fMAX
16
Mbps
Driver Propagation Delay
t PLH
12
18
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
t PHL
13.5
20.25
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Pulse Width Distortion,|t PHL –– t PLH |
PWD
1.5
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Output Falling Time or Rising time
tF
2.95
4.425
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
tR
2.6
3.9
ns
See Figure 2.4.2，，RL=54Ω，，CL=50pF
Driver Enable to Output High
tZH
18.5
27.75
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Enable to Output Low
tZL
19.1
28.65
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Disable to Output High
tHZ
20.8
31.2
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Driver Disable to Output Low
tLZ
20.1
30.15
ns
See Figure 2.4.3，，RL=110Ω，，CL=50pF
Receiver (NSi83086)
Maximum Data Rate
fMAX
16
Mbps
Receiver Propagation Delay
t PLH
16.2
24.3
ns
See Figure 2.4.4，， CL=15pF
t PHL
22.2
33.3
ns
See Figure 2.4.4，， CL=15pF
Receiver Pulse Width Distortion, |t
PWD
6.0
ns
See Figure 2.4.4，， CL=15pF
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 7
PHL –– t PLH |
Receiver Output Falling Time or Rising time
tF
2.3
3.45
ns
See Figure 2.4.4，， CL=15pF
tR
2.1
3.15
ns
See Figure 2.4.4，， CL=15pF
Receiver Enable to Output High
tZH
13.8
20.7
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Enable to Output Low
tZL
12.6
18.9
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Disable to Output High
tHZ
14
21
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
Receiver Disable to Output Low
tLZ
13.4
20.1
ns
See Figure 2.4.5，，RL=1kΩ，，CL=15pF
2.3. TYPICAL PERFORMANCE CHARACTERISTICS
Figure 2.1 NSi83085 VDD1 supply current vs Temperature Figure 2.2 NSi83085 VDD2 supply current vs Temperature
Figure 2.3 NSi83086 VDD1 supply current vs Temperature Figure 2.4 NSi83086 VDD2 supply current vs Temperature
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 8
Figure 2.5 Receiver output current vs Output low voltage Figure 2.6 Receiver output current vs Output High voltage
Figure 2.9 NSi83085 Transmitter Propagation Delay vs Temperature Figure 2.10 NSi83085 Receiver Propagation Delay vs Temperature
Figure 2.11 NSi83086 Transmitter Propagation Delay vs Temperature Figure 2.12 NSi83086 Receiver Propagation Delay vs Temperature
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 9
2.4. PARAMETER MEASUREMENT INFORMATION
Y
Z
VOD
RL/2
RL/2 VOC
Figure 2.4.1 Driver DC Test Load
D
VOD RL CL
Y
Z
Figure 2.4.2 Driver Timing Test Circuit and waveform
D
Y
Z
50ohm
DE
CL VDD2
OUT
GND or
VDD1
Figure 2.4.3 Driver Enable Disable Timing Test Circuit and waveform
A R
RE
15pF
OUT
B
Figure 2.4.4 Receiver Propagation Delay Test Circuit and waveform
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 10
A R
50ohm
RE
15pF VDD1
OUT
+1.5V
-1.5V B
Figure 2.4.5 Receiver Enable Disable Timing Test Circuit and waveform
VDD1
GND2
A
B
GND1 VDD2
/RE
R
D
DE
VDD1
0.8V
or 2V
15pF
VOUT
GND1
Figure 2.4.6 Common-Mode Transient Immunity Test Circuit
3.0 HIGH VOLTAGE FEATURE DESCRIPTION
3.1. INSULATION AND SAFETY RELATED SPECIFICATIONS
Parameters Symbol Value Unit Comments
Minimum External Air Gap
(Clearance)
L(I01) 8.0 mm Shortest terminal-to-terminal
distance through air
Minimum External Tracking
(Creepage)
L(I02) 8.0 mm Shortest terminal-to-terminal
distance across the package
surface
Minimum internal gap DTI 20 um Distance through insulation
Tracking Resistance(Comparative
Tracking Index)
CTI >400 V DIN EN 60112 (VDE 0303-11);
IEC 60112
Material Group Ⅱ
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 11
3.2. DIN VDE V 0884-11（VDE V 0884-11）:2017-01 INSULATION CHARATERISTICS Description Test Condition Symbol Value Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150Vrms
Ⅰ
Ⅰto ⅣⅣ
For Rated Mains Voltage ≤ 300Vrms
Ⅰ
Ⅰto ⅣⅣ
For Rated Mains Voltage ≤ 400Vrms
Ⅰ
Ⅰto ⅣⅣ
Climatic Classification
10/105/21
Pollution Degree per DIN VDE 0110, Table 1
2
Maximum repetitive isolation voltage
VIORM
849
Vpeak
Input to Output Test Voltage, Method B1
V IORM × 1.5 = V pd (m) , 100% production test,
t ini = t m = 1 sec, partial discharge < 5 pC
V pd (m)
1273
Vpeak
Input to Output Test Voltage, Method A
After Environmental Tests Subgroup 1
V IORM × 1.2 = V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC
V pd (m)
1019
Vpeak
After Input and /or Safety Test Subgroup 2 and Subgroup 3
V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC
V pd (m)
1019
Vpeak
Maximum transient isolation voltage
t = 60 sec
VIOTM
7000
Vpeak
Maximum Surge Isolation Voltage
Test method per IEC60065,1.2/50us waveform, VTEST=1.3×VIOSM
VIOSM
5384
Vpeak
Isolation resistance
VIO =500V
RIO
109
Ω
Isolation capacitance
f = 1MHz
CIO
0.6
pF
Input capacitance
CI
2
pF
Total Power Dissipation at 25℃℃
Ps
1499
mW
Safety input, output, or supply current θJA = 140 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C
Is
mA
θJA = 84 °C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C
237
mA
Case Temperature
Ts
150
℃
℃
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 12
Figure 3.1 NSi83085/NSi83086 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN VDE V 0884--11
Figure 3.2 NSi83085/NSi83086 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN VDE V 0884--11
3.3. REGULATORY INFORMATION
The NSi83085/NSi83086 are approved or pending approval by the organizations listed in table. CUL VDE CQC
UL 1577 Component Recognition Program1
Approved under CSA Component Acceptance Notice 5A
DIN VDE V 0884--11(VDE V 0884--11):2017--012
Certified by CQC11--471543--2012
GB4943.1--2011
Single Protection, 5000Vrms Isolation voltage
Single Protection, 5000Vrms Isolation voltage
Basic Insulation 1131Vpeak, VIOSM=5384Vpeak
Basic insulation at 800VRMS (1131Vpeak)
Reinforced insulation at 400VRMS (565Vpeak)
File (E500602)
File (E500602)
File (5024579--4880--0001)
File (pending)
1 In accordance with UL 1577, each NSi83085/NSi83086 is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.
2 In accordance with DIN VDE V 0884--11, each NSi8100W/NSi8101W is proof tested by applying an insulation test voltage ≥ 1273 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN VDE V 0884--11 approval.
0
0
20
20
40
40
60
60
80
80
100
100
120
120
140
140
160
160
180
180
0
0
50
50
100
100
150
150
200
200
Saftey Limiting Current (mA)
Saftey Limiting Current (mA)
Case Temperature (
Case Temperature (℃℃))
0
0
50
50
100
100
150
150
200
200
250
250
0
0
50
50
100
100
150
150
200
200
Saftey Limiting Current (mA)
Case Temperature (
Case Temperature (℃℃))
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 13
4.0 FUNCTION DESCRIPTION
NSi83085 is a high reliability isolated half duplex RS--485 transceiver , while NSi83086 is an isolated full duplex RS--485 transceiver. Data isolation is achieved using Novosense integrated capacitive isolation that allows data transmission between the logic side and the Bus side. Both devices are safety certified by UL1577 support 5kVRMS insulation withstand voltages.
4.1. DATA RATE
The data rate of NSi83085 is 500kbps. The device is slew limited to reduce EMI and reflections with improperly terminated transmission line. The data rate of NSi83086 is up to 16Mbps.
4.2. TRUE FAIL-SAFE RECEIVER INPUTS
The devices feature fail--safe circuitry, which guarantees a logic--high receiver output when the receiver inputs are open or shorted. The receiver threshold is fixed between --50mV and --200mV, which meets EIA/TIA--485 standard. If the differential input voltage (VA--VB) is greater than or equal to --50mV, receiver output R is logic high. In the case of a terminated bus with all transmitters disabled, the differential input voltage is pulled to zero by the termination resistors. Due to the receiver threshold, the receiver output R is logic high.
4.3. TRUTH TABLES
Table 4.1 Driver Function Table VDD1 status VDD2 status Input (D) Enable Input (DE) Outputs1 A/Y B/Z
PU
PU
H
H
H
L
PU
PU
L
H
L
H
PU
PU
X
L
Z
Z
PU
PU
X
OPEN
Z
Z
PU
PU
OPEN
H
H
L
PD
PU
X
X
Z
Z
PU
PD
X
X
Z
Z
PD
PD
X
X
Z
Z
1 PD= Powered down; PU= Powered up; H= Logic High; L= Logic Low; X= Irrelevant; Z= High Impedance; Driver output pins are Y and Z for NSi83086, A and B for NSi83085;
Table 4.2 Reciever Function Table1 VDD1 status VDD2 status Differential Input (VA--VB) Enable Input (/RE) Output (R)
PU
PU
≥--50mV
L/Open
H
PU
PU
≤--200mV
L/Open
L
PU
PU
Open/Short
L/Open
H
PU
PU
X
H
Z
PU
PU
Idle
L
H
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 14
PD PU X X Z
PU PD X X H
PD PD X X Z
1 PD= Powered down; PU= Powered up; H= Logic High; L= Logic Low; X= Irrelevant; Z= High Impedance.
4.4. THERMAL SHUTDOWN
The device is protected from over temperature damage by integrated thermal shutdown circuitry. When the junction temperature (TJ)
exceeds +165°C (typ), the driver outputs go high-impedance. The device resumes normal operation when TJ falls below +145°C (typ).
5.0 APPLICATION NOTE
5.1. 256 TRANSCEIVERS ON THE BUS
The devices have a 1/8-unit-load receiver input impedance (96kΩ) that allows up to 256 transceivers on the bus. Connect any
combination of these devices, and/or other RS-485 devices, for a maximum of 32 unit-loads to the line.
5.2. ESD PROTECTION
ESD protection structures are enhanced on all pins to protect against electrostatic discharge encountered during handing and
assembly. The Bus pins have extra protection against static electricity to both the logic side (VDD1 side) and bus side (VDD2 side).
ESD protection can be tested in various ways. Below is the ESD spec of the devices.
Bus pins:
± 8kV HBM.
±16kV using the Contact Discharge method specified in IEC 61000-4-2
Other pins except bus pins:
±6kV HBM.
±7kV using the Contact Discharge method specified in IEC 61000-4-2
5.3. LAYOUT CONSIDERATIONS
The NSi83085/NSi83086 requires a 0.1 μF bypass capacitor between VDD1 and GND1, 10uF bypass capacitor between VDD2 and
GND2. The capacitor should be placed as close as possible to the package. To eliminate line reflections, each cable end is terminated
with a resistor, whose value matches the characteristic impedance of the cable. It’s good practice to have the bus connectors and
termination resistor as close as possible to the A and B, Y and Z pins.
5.4. TYPICAL APPLICATION
VDD1
R
DE
GND2
A
B
GND1
D
/RE
VDD2
MICROPROCESSOR
AND UART
Figure 5.1 NSi83085 typical application circuit
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 15
R
A
B
D
/RE
DE
R
A
B
D
/RE
DE
R
B A
/RE DE D
Figure 5.2 Typical isolated Half-Duplex RS-485 application
VDD1
R
DE
GND2
A
B
GND1
D
/RE
Z
Y
VDD2
MICROPROCESSOR
AND UART
Figure 5.3 NSi83086 typical application circuit
R A
/RE B
Z
Y R
DE
A
B
D
/RE
Z
Y
R DE
A
B
/RE D
Z
Y
Master Slave
Slave
Figure 5.4 Typical isolated Full-Duplex RS-485 application
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 16
6.0 PACKAGE INFORMATION
VDD1
R
DE
GND1
GND2
A
NSi83085
B
GND2
GND1
D
/RE
NC
NC
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
GND1
VDD2
GND2
Figure 6.1 NSi83085 Package
VDD1
R
DE
GND1
GND2
A
NSi83086
B
GND2
GND1
D
/RE
Z
Y
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
GND1
VDD2
GND2
Figure 6.2 NSi83085 Package
Figure 6.3 SOIC16 Package Shape and Dimension
Dimensions shown in millimeters and (inches)
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 17
Table6.1 NSi83085 Pin Configuration and Description NSi83085 PIN NO. SYMBOL FUNCTION
1
VDD1
Power Supply for Isolator Side 1
2
GND1
Ground 1, the ground reference for Isolator Side 1
3
R
Receive output
4
/RE
Receive enable input. This is an active low input.
5
DE
Driver enable input. This is an active high input
6
D
Driver transmit data input.
7
GND1
Ground 1, the ground reference for Isolator Side 1
8
GND1
Ground 1, the ground reference for Isolator Side 1
9
GND2
Ground 2, the ground reference for Isolator Side 2
10
GND2
Ground 2, the ground reference for Isolator Side 2
11
NC
No Connection.
12
A
Noninverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin A is put into a high impedance state to avoid overloading the bus.
13
B
Inverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin B is put into a high impedance state to avoid overloading the bus.
14
NC
No Connection.
15
GND2
Ground 2, the ground reference for Isolator Side 2
16
VDD2
Power Supply for Isolator Side 2
Table6.2 NSi83086 Pin Configuration and Description NSi83086 PIN NO. SYMBOL FUNCTION
1
VDD1
Power Supply for Isolator Side 1
2
GND1
Ground 1, the ground reference for Isolator Side 1
3
R
Receive output
4
/RE
Receive enable input. This is an active low input.
5
DE
Driver enable input. This is an active high input
6
D
Driver transmit data input.
7
GND1
Ground 1, the ground reference for Isolator Side 1
8
GND1
Ground 1, the ground reference for Isolator Side 1
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 18
9
GND2
Ground 2, the ground reference for Isolator Side 2
10
GND2
Ground 2, the ground reference for Isolator Side 2
11
Y
Noninverting Driver Output. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin Y is put into a high impedance state to avoid overloading the bus.
12
Z
Inverting Driver Output. When the driver is disabled, or when VDD1 or VDD2 is powered down, Pin Z is put into a high impedance state to avoid overloading the bus.
13
B
Inverting Receiver Input.
14
A
Noninverting Receiver Input.
15
GND2
Ground 2, the ground reference for Isolator Side 2
16
VDD2
Power Supply for Isolator Side 2
7.0 TAPE AND REEL INFORMATION
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 19
Figure 7.1 Tape and Reel Information of WB SOIC16
8.0 ORDER INFORMATION Part No. Isolation Rating(kVRMS) Duplex Max Data Rate (MHz) Temperature No. of Nodes Package
NSi83085
5
Half
0.5
-40 to 105℃℃
256
WB SOIC16
NSi83086
5
Full
16
-40 to 105℃℃
256
WB SOIC16
NOTE: All packages are RoHS--compliant with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures.
NSi83085/NSi83086
Copyright © 2019, NOVOSENSE Page 20
9.0 REVISION HISTORY
Revision Description Date
1.0
2018/7/15
1.2
Add NSi83086 spec
2018/10/15
1.3
Change table 3.1 VDE insulation Characteristics
2018/12/20
1.4
Change Certification Information
2019/06/17
我要用NSi83085芯片与GD32单片机连接，NSi83085的应用电路是什么，用中文回复
思考
回答
下面给出一个典型的 NSi83085（隔离型半双工 RS-485 收发器）与 GD32 系列单片机连接的参考应用电路示意，并对关键器件及引脚功能做简要说明。此电路可用于工业环境下的半双工 RS-485 通讯。
一、典型应用电路示意
text┌───────────────┐ │ GD32 MCU │ │ │ Tx --->----│ PAx (Tx GPIO) │ Rx <-------│ PAy (Rx GPIO) │ DE/RE 控制 ----│ PAz (GPIO) │ │ │ └───────────────┘ | | VDD1=3.3V | | GND1 | | | |─────────────────────┐ | | ┌▼──────────────────────────▼─────────────────────┐ │ NSi83085 │ │ ┌─────────────────────────────────────────┐ │ VDD1=3.3V --------│1 │ VDD1 VDD2│16│--- 5V 或 3.3V（总线侧电源） GND1│2 │ GND1 GND2│15│--- GND2（隔离后地） R <--- MCU Rx│3 │ R NC │14│(NC 或保留) /RE <--- GPIO │4 │ /RE B │13│--- RS-485 总线 B DE ---> GPIO │5 │ DE A │12│--- RS-485 总线 A D ---> MCU Tx│6 │ D NC │11│(NC 或保留) GND1│7 │ GND1 GND2│10│--- GND2（隔离后地） GND1│8 └─────────────────────────────────────┬───┘9 │--- GND2（隔离后地） └──────────────────────────────────────────┘ (内部隔离屏障)
- A、B 为 RS-485 半双工总线接口；A 是同相端，B 是反相端。
- R 为接收数据输出（给 MCU 端）；D 为发送数据输入（来自 MCU 端）；DE、/RE 用于控制收发器的发送与接收使能。
- 逻辑侧电源：VDD1（如 3.3V），对应地脚：GND1
- 总线侧电源：VDD2（3.0V～5.5V 均可，常见为 5V），对应地脚：GND2
二、关键连接及说明
-
电源与去耦电容
- VDD1–GND1（MCU 侧电源）：推荐在芯片 VDD1 和 GND1 之间就近放置一个 0.1µF 的去耦电容。
- VDD2–GND2（RS-485 总线侧电源）：推荐放置一个 0.1µF 的去耦电容，并在电源线上加一个较大的滤波电容（如 10µF）以降低总线侧的电源纹波。
- 若现场总线为 5V 供电，则可直接给 VDD2 供 5V；若需要 3.3V 总线也可行（前提是符合 RS-485 总线兼容要求）。
-
数据端口
- D（引脚 6）：为驱动器输入，对应 MCU 的 Tx 输出引脚。
- R（引脚 3）：为接收器输出，对应 MCU 的 Rx 输入引脚。
- DE（引脚 5）：驱动器使能端（高电平使能发送），可由 MCU 的 GPIO 控制；若只做单向发送可直接拉高；若需收发切换，可软件控制。
- /RE（引脚 4）：接收器使能端（低电平使能接收），通常与 DE 连接在一起做半双工自动收发切换，或由单独 GPIO 控制。
- 若将 DE 与 /RE 反相连接（比如将 /RE = ~DE），当 DE=1 时发送使能、接收禁止；当 DE=0 时发送禁止、接收使能，即可轻松实现半双工收发切换。
-
RS-485 总线端口
- A、B（引脚 12、13）：RS-485 差分信号线。半双工总线一般需要在总线两端各并接一个 120Ω 终端电阻。若只在一端挂载，也需在最远端加上匹配电阻以减小反射。
- NSi83085 芯片在未使能驱动器或断电时，A、B 都处于高阻状态，不会影响总线。
-
隔离与接地
- NSi83085 内部集成电容隔离，无需外置数字隔离器。
- 逻辑侧 (MCU 侧) 与总线侧是完全电气隔离的，必须保证 GND1 与 GND2 不直接相连。
- 隔离能有效提高系统的抗干扰能力和安全性，适合工业现场中存在地电位差或大噪声场合。
-
保护措施与 EMC
- A、B 差分线对外通常会经过 TVS 二极管等 ESD/浪涌防护器件；也可加共模电感或磁珠滤波，具体视现场 EMI/EMC 要求。
- 芯片本身的 A、B 管脚已集成 ±16kV 的 IEC61000-4-2 接触放电 ESD 保护，但复杂环境下建议进一步加强外部防护。
-
软硬件使用要点
- 半双工模式下，MCU 软件需在发送和接收之间进行 DE、/RE 控制切换（或使用自动流控）以避免冲突。
- 若总线空闲时希望接收器输出保持高电平，可利用 NSi83085 的“真失效保护”（fail-safe）特性，无需额外上拉电阻。
三、总结
- NSi83085 提供了电气隔离和 RS-485 半双工通讯所需的收发功能，具有高抗干扰能力和低电磁辐射的优点。
- 在与 GD32 等单片机配合时，主要确保正确的电源、地线隔离布线，以及发送、接收和 DE/RE 控制管脚的时序与软件切换。
- RS-485 总线要做好端接与防护，从而在工业环境下稳定运行。
以上电路及说明可作为初步的参考设计，实际应用需根据系统的总线结构、 EMC/EMI 规范以及安全要求进行适当调整。希望对您在使用 NSi83085 与 GD32 进行 RS-485 通讯设计时有所帮助。
問題
我计划总线侧有5v和GND过来，5v经过如11173.3芯片给单片机和NSi83085的VDD1用，5V接给VDD2用，这样对吗，但GND怎么隔离呢
思考
回答
如果您想真正发挥 NSi83085 隔离式 RS-485 收发器的作用，就必须确保芯片两侧 (VDD1/GND1 与 VDD2/GND2) 之间没有直接电气连接，也就是说两侧电源和地必须“隔离”开，这正是所谓“隔离”的意义所在。
1. 为什么不能直接用同一个 5V/GND 给两侧供电？
-
隔离收发器的本质：
NSi83085 内部包含一个高压介质(电容/磁/光耦等形式)，将“MCU 侧”与“RS-485 总线侧”在电气上进行物理隔离。这要求 MCU 端 (VDD1/GND1) 与总线端 (VDD2/GND2) 不共地，才能有效阻断地环电流和高压干扰，实现工业现场中常说的“地电位差隔离”、“保护人身和设备安全”的目的。 -
如果只有一套 5V 电源，并且它的 GND 只有一条，那么无论您是用 LDO（如 1117-3.3）把 5V 转成 3.3V 给 MCU 和 VDD1，还是直接 5V 给 VDD2，一旦这两个电源地线实质是同一根地线，就无法实现隔离。
-
这样做会导致 NSi83085 两侧的地 (GND1 和 GND2) 其实是短接的，内部隔离等效被“旁路”了，也就失去了隔离的意义。
2. 如何才能让 GND1 和 GND2 彼此隔离？
通常有以下几种常见做法：
-
使用两路完全独立的电源
- 例如：
- 一个独立小电源模块（如线性电源/开关电源）输出 5V 给“总线侧”VDD2/GND2；
- 另一个独立小电源(或 DC/DC)输出 3.3V 给“MCU 侧”VDD1/GND1，且两组电源在物理上不共地。
- 这种做法最直接，真正实现“地”层面的物理隔离。
- 例如：
-
使用隔离式 DC/DC 模块
- 如果您现场只有一组 5V 电源，但想要得到与之“隔离”的另一组 3.3V 或 5V，可选用 “带隔离的 DC/DC” 模块。
- 例如常见的模块电源 (如 MORNSUN、RECOM、XP Power 等品牌) 或者自制变压器 + 推挽式驱动的做法，把原边 (输入端) 和副边 (输出端) 隔开，副边输出再稳压给 NSi83085 的 VDD1/GND1 端使用。
- 总线侧(VDD2/GND2)可直接用原先的 5V/GND2。
- 这样，隔离 DC/DC 的输入端与输出端之间没有直连地线，满足了隔离要求。
-
某些完整的“带隔离收发器”模块
- 市面上有些第三方模块(或示例板)可能集成了隔离 RS-485 收发器 + 隔离电源供给(例如芯片里包含了数据隔离与部分电源隔离功能)，那就更省事，但要看器件规格是否满足应用需求。
简言之，不管哪种方式，都需要让芯片 GND1 与 GND2 之间“悬空”或只通过隔离介质交互信号，不能同一根地线直连。
3. 典型隔离供电框图示例
以下是一个示意框图，展示了如果只有一路主 5V 电源，想要给 NSi83085 的 MCU 侧提供隔离电源时，该如何做（以“隔离 DC/DC”方案为例）：
text主5V电源 ---->----- VDD2 (NSi83085 总线侧电源) | ┌─▼─────────────────────┐ │ 隔离式DC/DC模块 │ │ (输入: 5V, 输出:3.3V/5V ) └─┬─────────────────────┘ | [隔离输出] --->- VDD1 (NSi83085 MCU侧电源) | GND1 (隔离输出地) [主5V参考地] -> GND2 (NSi83085 总线侧地)
- 输入端 (5V/GND2) 是和 RS-485 总线同一个地或系统主地；
- 输出端 (3.3V/GND1) 则完全“浮地”，用来给 MCU 和 NSi83085 的逻辑侧 VDD1 供电。
- NSi83085 内部的数据通道实现对收发器逻辑信号的电气隔离；隔离 DC/DC 则实现对电源的电气隔离。
- 从而保证了 GND1 与 GND2 不会相互直连。
4. 小结
- 隔离 绝不只是在信号线上使用隔离收发器就完事儿，还要确保电源/地线也有对应的隔离手段，否则整个系统仍然是同地、没有实现真正的安全/抗干扰隔离。
- 如果您现场只有单电源 (5V + GND)，想用 NSi83085 做隔离，必须额外添加“隔离电源模块”或独立电源，让 VDD1/GND1 与 VDD2/GND2 分离。
- 如果您暂时并不需要真正的“电气隔离”，只想用 NSi83085 当普通 RS-485 芯片用，那么可以直接同地供电，但这就失去了隔离收发器原本的价值，一般会选择成本更低的非隔离型 RS-485 芯片替代。
如上，希望能帮您理解“为什么 GND 无法直接共用”、以及“如何正确实现电源隔离和总线侧隔离供电”。只有满足这两点，NSi83085 的5kVrms 高压隔离才真正有效。
問題
帮我推荐一个可以隔离的电源芯片，输出3.3V的，体积要小，必须中国产的
思考
回答
如果您已有 5V 输入电源，需要一个输出 3.3V 且带隔离的小体积电源模块，且希望选用国产品牌，可以重点考虑 金升阳（Mornsun） 旗下的隔离 DC/DC 系列。金升阳是国内较为知名的电源模块厂商，在小功率隔离电源领域有多种封装和规格可选。下面给您一个示例器件并说明其特点。
一、推荐示例器件 —— Mornsun B0503LS-1WR2 系列
- 典型输入电压：5V DC
- 输出电压：3.3V DC
- 输出功率：1W（足以驱动一般 MCU 与隔离侧收发器用电）
- 封装：小体积 SIP 封装或 SMD 封装（LS 系列通常更紧凑）
- 隔离耐压：常见为 1500VDC 或 3000VDC（不同后缀有所差异，可满足多数基本隔离场合）
- 工作温度范围：-40℃ ~ +85℃（具体看型号后缀）
尺寸方面：B0503LS-1WR2 的封装长度与宽度都比较紧凑（典型 15.24mm×11.40mm，高度约 6mm），能够满足大部分对体积敏感的应用。
注：如果需要更高隔离耐压（如 6kV 或更高）或更高输出功率，也可查看金升阳其他系列（如 B05xxS-3W、B05xxS-6W 等），但尺寸会相应增大。
二、使用注意事项
-
输入端 5V 电压范围
- 确认模块的输入范围是否与您实际电压相匹配，典型宽范围如 4.5
5.5V 或 4.59V 等，不同型号稍有差异。
- 确认模块的输入范围是否与您实际电压相匹配，典型宽范围如 4.5
-
输出端功率与负载
- 如果隔离侧只带一个 RS-485 收发器（如 NSi83085）加上少量 MCU 外围，1W 一般足够。若您后续还要带更多外设，则需考虑冗余功率。
-
隔离电压与安规
- 虽然模块标注了隔离耐压（如 1.5kVDC、3kVDC 等），但如果您的应用对安全隔离或高压场合有额外要求（如 5kVrms 以上），需选更高等级系列或采用多级隔离方案。
-
外围滤波与布局
- 模块输入端和输出端应各自加去耦电容，以抑制纹波和干扰。
- 注意模块的输入侧（与主 5V 及主系统地相连）和输出侧（给 NSi83085 的 VDD1/GND1）地线不要互相连接，以确保真正的电气隔离。
-
工作环境温度
- 确认系统整体的散热情况，如需高温环境，留意模块的最大工作温度与降额曲线。
三、其他可选国产品牌
除了金升阳（Mornsun）以外，国内还有一些厂商也提供小体积隔离电源模块，例如：
- 华大电源（HENGDA, 功德电子）
- 牛能（NENPOWER）
- 顺源电子（SunYuan）
- 其他国产品牌（如某些贴牌电源模块亦来自国产代工厂）
在选型时，需要关注：
- 输入电压范围与效率
- 隔离耐压、封装尺寸
- 工作温度范围
- 可靠性和售后支持
金升阳在工业控制、仪表等场景中应用广泛，资料相对齐全，故常被首选。
四、简单应用框图
以下示例展示一个 5V 单电源输入，通过金升阳 B0503LS-1WR2 输出 3.3V 给 NSi83085（MCU 侧），从而实现真正的电气隔离。
text主5V电源(系统侧) │ │ 5V(输入) │ ┌────▼─────────────────────┐ │ 金升阳 B0503LS-1WR2 │ │ (隔离式 DC/DC 模块) │ └────┬─────────────────────┘ │ │ 3.3V(输出，隔离侧) ┌─▼────────────────┐ │ MCU + NSi83085 │ │ (VDD1/GND1 端) │ └──────────────────┘
- 隔离模块输入端 与主系统供电同地 (GND2)；
- 隔离模块输出端 则给 MCU 和 NSi83085 的 VDD1/GND1 供电，此处与主系统地分离；
- NSi83085 的总线侧 (VDD2/GND2) 可以直接用系统 5V/GND。
这样就能既利用单路 5V 电源，又在隔离模块输出端得到 3.3V 隔离电源，满足 NSi83085 与 MCU 的正常工作并保持地线隔离。
小结
- 您需要的“5V 输入、3.3V 输出、隔离”且“体积较小的国产电源芯片”，可优先考虑 金升阳 B0503LS-1WR2 或同系列其他型号。
- 选型时要综合评估 输出功率、隔离耐压、尺寸、效率、温度范围 等因素。
- 别忘了在电路设计与 PCB 布局上做好输入输出侧滤波、充分预留安全间距、避免地线交叉，以真正实现隔离的效果。
以上，希望对您的隔离供电选型有所帮助。祝项目顺利!